– 4 Independent Receivers (Rx)
– 1 Independent Transmitter (Tx)
– Simple CPU interface type
– 8-Bit Data-bus
– ARINC 429 Interface : ‘1’ and ‘0’ Lines, RZ code
– Software Label Control
– Parity Control : Odd or No Parity
– Interrupt Capability
– Test mode Capability
– FPGA speed grade Operating Frequency dependant
– Available in VHDL source code format for ease of customization
– Can be customised by Logic Design Solutions
The MEF4442A is an ARINC 429 controller. It is based on the EF4442 in mode A only. This macro is not strictly compatible with the EF4442.
This macro can be customized according to specific needs (application-specific requirement). Any other pre-designed functions can be integrated into the FPGA. FPGA density and I/O requirements can be defined according to customer specification.