France, Gournay sur Marne, September 12th 2024 – The new NVME-HOST-IP of Logic Design Solutions enables now random access in addition to the existing sequential access and multi-user access. FAT32 file system working in RAID0 has been added as well.
To show all of these new features, new demos, from which customers can re-use to start their project, have been done :
- Sequential access with one or two disks (RAID0) with or without FAT32.
- Random access evaluation.
- Simultaneous write access and read access (Multi users).
- CPU (C Source code provided) or State Machine (VHDL provided) Demo.
All of these features in one single IP !
The Zynq Ultra Scale + is the first FPGA family to support this new NVME HOST IP.